1. Field of the Invention
The present invention relates to a system and method for checking a length of a wire path between a capacitor and a via of a printed circuit board (PCB) design.
2. Description of Related Art
In electronics, PCBs are used to mechanically support and electronically connect electronic components using conductive pathways, traces, or etched copper sheets laminated onto a non-conductive substrate.
Some PCBs have multiple layers and are called multilayer PCBs. The multilayer PCBs are composed of between one and twenty-four conductive layers separated and supported by layers of insulating material (substrates) laminated (glued with heat, pressure or vacuum) together. Every two adjacent layers may be connected together through a drilled hole that is called a via.
The use of vias brings equivalent serial inductance (ESL), which leads to low-frequency power supply noise and high-frequency electromagnetic interference. The ESL is actually proportional to the area of an electric current loop (pin→capacitor→via→ground→pin). Hence, it is very important to control the area of the electric current loop, by means of checking a length of a wire path between a capacitor and a via of a PCB design. Obviously, it is generally difficult, laborious and time-consuming to check the length manually.
What is needed, therefore, is a system and method which can check a length of a wire path between a capacitor and a via of the PCB design, for the sake of reducing labor intensity and enhancing work efficiency.